1. Field of the Invention
The present invention relates in general to an information processing apparatus such as a personal computer, a work station or the like, and more particularly to a method of controlling a memory provided in such an apparatus.
2. Description of the Related Art
In recent years, an information processing apparatus such as a personal computer, a work station or the like has kept on being miniaturized as well as being promoted with respect to the high performance. The throughput of a microprocessor which is the main unit of such an information processing apparatus has been rapidly enhanced by being supported by the progress of the semiconductor process technology. Thus, the product has appeared which exhibits the high performance at a high operation frequency while keeping the power consumption low. Along with such rapid enhancement of the capability of the microprocessor, the memory is required which can cope with the enhanced throughput of the microprocessor. Then, as for the new memory device which compensates for a difference between the capability of the microprocessor and that of the memory device, a synchronous dynamic random access memory device (hereinafter, referred to as "a synchronous DRAM device" for short, when applicable) has appeared in the market.
The synchronous DRAM device serves to carry out the operation of reading out the data every one clock period for the request of reading out the data synchronously with the given driving clock signal, and has the feature in which it can cope with the high operation frequency of the microprocessor. At the present time, the synchronous DRAM device which can cope with the driving clock frequency of 100 MHz (one clock signal corresponds to 10 ns) has been manufactured. As for such a memory control method, there is known the technology which is disclosed in JP-B-60-3699 for example.
In the case where the synchronous DRAM device as described above is applied to a memory system of the information processing apparatus, for the performance of an input-output buffer of an LSI for controlling a memory, the temperature and the power source voltage, the dispersion in characteristics of the synchronous DRAM device against the change in the operation environment needs to be taken into consideration. The dispersion in the characteristics of the synchronous DRAM device due to the change in the operation environment is an obstacle to bringing out the high operation performance of the synchronous DRAM device and as a result the driving clock frequency of the current practical memory system is limited to about 33 MHz (one clock signal corresponds to 30 ns). Therefore, it can be said that under the present circumstances, it is impossible to make the best use of the high speed reading performance of the synchronous DRAM device as much as possible.